DR.RAVI BOLIMERA; MRS. K. THRISANDHYA; RAJULAPATI. PAVAN KUMAR; PATHA. VIMAL KOUSHIK; SHAGAANTI. SANDEEP. DESIGN OF LOW POWER SRAM IN 45nm CMOS TECHNOLOGY. International Journal of Data Science and IoT Management System, [S. l.], v. 4, n. 4, p. 43–45, 2025. DOI: 10.64751/ijdim.2025.v4.n4.pp43-45. Disponível em: https://ijdim.com/journal/index.php/ijdim/article/view/147. Acesso em: 28 oct. 2025.