NOVEL INVERTER ARCHITECTURE FOR THIRD HARMONIC ELIMINATION

Authors

  • K BHAJARANG Author
  • TEKU KIRAN KUMAR Author
  • C MALLESH Author
  • MAMIDI PRASHANTH KUMAR GOUD Author
  • DR. A.IMMANUEL Author

DOI:

https://doi.org/10.64751/

Keywords:

inverter; Pulse Width Modulation; harmonic; controller

Abstract

The proposed work focuses on implementing a third harmonic elimination technique in an inverter system using the SG3525 PWM controller along with an optocoupler. The primary objective is to minimize harmonic distortion in the output voltage waveform, thereby improving efficiency and reducing stress on the connected loads. The SG3525 generates the required pulse-width modulated (PWM) signals, while the optocoupler provides galvanic isolation between the control circuit and the power stage for safe and reliable operation. By applying suitable modulation strategies and control algorithms, the third harmonic component is effectively suppressed, producing a cleaner sinusoidal output. The project details the design methodology, simulation studies, and experimental validation, clearly demonstrating the effectiveness of the approach in harmonic mitigation and enhancing the overall performance of the inverter system.

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Published

2024-04-15

How to Cite

K BHAJARANG, TEKU KIRAN KUMAR, C MALLESH, MAMIDI PRASHANTH KUMAR GOUD, & DR. A.IMMANUEL. (2024). NOVEL INVERTER ARCHITECTURE FOR THIRD HARMONIC ELIMINATION. International Journal of Data Science and IoT Management System, 3(2), 43-47. https://doi.org/10.64751/

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